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Archive
1996
1997
1998
1999
2000
2001
Articles
Infrastructure
for Design Reuse
Solve
Timing and Signal Integrity Problems
An
Effective Way of Design Reuse
Success
Stories
Synopsys
chooses RUBICAD's LADEE for layout migration of 0.13-micron memory compilers
Peregrine
cuts design time and costs
IMI
increases performance
OKI
reuses
Hard IP
Philips
migrates microprocessor core
Qualcomm
optimizes Standard Cell Libraries
Xilinx
migrates
FPGA |
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June
2001
New Physical
Design Tool Allows Faster Utilization of Deep Sub-Micron Technology
Rubicad Corporation,
a world-leading EDA supplier of layout, manipulation and optimization tools
for physical circuit designs, today announces DECOR, a brand new physical
design tool based on "hyper-cell" technology. DECOR will significantly
reduce physical verification cycles in ultra-deep sub-micron technologies.
>>more
October
2001
BECS supports
IC designers moving from traditional time-consuming "polygon pushing" to
higher productivity.
Due to the
huge popularity of the LINUX version and increased customer requests for
the Solaris version of BECS, Rubicad's management team decided to also
offer a free Solaris version. Designers can now download the free BECS
license from Rubicad's website.>>more
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