Events
DAC 2002

Articles
Infrastructure for Design Reuse
Solve Timing and Signal Integrity Problems
An Effective Way of Design Reuse

Success Stories
Synopsys chooses RUBICAD's LADEE for layout migration of 0.13-micron memory compilers
Peregrine cuts design time and costs
IMI increases performance
OKI reuses Hard IP
Philips migrates microprocessor core
Qualcomm optimizes Standard Cell Libraries
Xilinx migrates FPGA

BECS supports IC designers moving from traditional time-consuming "polygon pushing" to higher productivity. 

San Jose, CA, October 8, 2001..... Rubicad Corporation, a world-leading EDA supplier of layout manipulation and optimization tools for physical circuit designs, today announced that it will offer its popular layout editor BECS for free. At this year’s Design Automation Conference 2001, Rubicad gave away certificates for a free LINUX version of BECS, the full custom layout editor for IC mask layout, to all who visited the Rubicad demo suite. Hundreds of designer took advantage of this offer and downloaded the software from Rubicad's website after the conference.

Due to the huge popularity of the LINUX version and increased customer requests for the Solaris version of BECS, Rubicad's management team decided to also offer a free Solaris version. Designers can now download the free BECS license from Rubicad's website http://www.rubicad.net/download/becsforfree.htm

Full Custom Layout - Opportunity for Extensive Automation

BECS is the fully functional, standalone polygon editor tailored for deep sub-micron IC design and system-on-chip, which targets users doing designs from standard cells up to those with multiple millions of gates.
One ever-increasing bottleneck in IC layout design is the creation of full-custom layout designs. These designs include the standard cell libraries needed for place & route tools, the leaf cells for module generators and memory design, as well as custom analog and digital designs. The reasons for the increased effort required for full custom layout are larger, more complex circuits, a smaller layout grid, and more complex design rules. In deep sub-micron technology the grid values become extremely small compared to the feature sizes of the layout structure. This large difference between drawing grid and drawn structure slows down the layout generation process. With minimum design rules, the designer has to zoom in much further to draw. Thus, even a small standard cell design can become a large design. This difference in grid resolution makes it harder to edit full custom layouts. The addition of more complex and global design rules presents an even greater challenge. 
Several years ago, the initial approach to overcoming the bottleneck in layout design was symbolic layout compaction. However, this route was not successful because of several technical limitations.

BECS overcomes the limitations of conventional editors by supporting the very best polygon entry. In combination with the LADEE tool suite, compaction capabilities are available in one common environment. Mixing the capabilities of Rubicad's LADEE design environment with BECS provides a unique level of design flexibility. BECS gives the layout designer the freedom to choose a bigger grid value and let the LADEE correction technology automatically fix the design rules and the grid. 

BECS supports IC designers who are moving from traditional, time-consuming "polygon pushing" to higher productivity. It reduces the amount of time required to generate a layout by allowing designers to roughly place devices, and then let the layout correction and compaction technology of the LADEE tool suite automatically correct design rules, size devices, and compact the layout to its highest possible density.

100% Data Security
BECS’s flexible auto-save mode ensures data security. Since that is not enough for the secure handling of huge data systems, BECS also monitors and records every user action. In case of a power down or network error, all data can be recovered and automatically reconstructed. This is a significant benefit considering the occasional power-down situations that can occur in California, which caused hugh losses in Silicon Valley during this past year.

About Rubicad

Rubicad Corporation is the pioneer in developing automatic layout manipulation and design software. The company addresses the physical design tool market, and offers layout migration and design tools and services.
Rubicad's design methodology, containing a layout modification approach, solves most physical layout problems. Many companies have adopted layout manipulation technology to reduce the effects of wafer shortages and create second-source wafer supplies. The same layout manipulation technology can be used to solve timing, power and signal integrity problems in order to reduce the number of design iterations. Layout manipulation technology is further needed to convert hard IP to different technologies and to enable a global design reuse strategy that will reduce time-to-market pressures. 
By providing best-in-class tools, effective design reuse methodologies, and TopQuality Service, Rubicad is the essential partner to companies that design leading-edge technologies and systems-on-a-chip.
Customers include major international IC manufacturers, semiconductor and fabless companies, and system manufacturers.
For more information, contact RUBICAD Corp., 111 North Market Street, Suite 940, San Jose, CA 95113, Tel. 408-995-3334, Fax: 408-995-3335, www.rubicad.net, info@rubicad.com

LADEE, LACE and BECS are trademarks of Rubicad 
###