Articles
Infrastructure for Design Reuse
Solve Timing and Signal Integrity Problems
An Effective Way of Design Reuse

Success Stories
Alpha CPU goes 0.13 Micron
Synopsys chooses Rubicad's LADEE for layout migration of 0.13-micron memory compilers
Peregrine cuts design time and costs
IMI increases performance
OKI reuses Hard IP
Philips migrates microprocessor core
Qualcomm optimizes Standard Cell Libraries
Xilinx migrates FPGA

Automatic Layout Modification
Including design reuse of the ALPHA CPU in 0.13 micron SOI technology
by Michael Reinhardt, Rubicad Corporation
 

"Automatic Layout Modification is the way to close the backend design automation gap. ALM is what we miss today desperately. Not using it we pay for with increasing design time and cost. This book is the first complete source of information on Physical Design Reuse. To read it is a must for each design and engineering manager. "
Josef Stockinger, STMicrosystems, Germany

"This book does a great job in capturing the problems and solutions for SOC physical design reuse in the deep sub-micron era. Its importance will grow as process dimensions shrink below 100nm."
Resve Saleh, Professor at the Dept. of ECE, University of British Columbia, and a Founder of Simplex Solutions, Canada

"Automatic Layout Modification is a technique that is little understood or used in today's design environment.  This book explains why it is important today and will become even more so as processes continue to shrink in the future. "
John Yarborough, Philips Semiconductor, Sunnyvale, CA

"Automated migration of transistor-level designs from one process to another is a significant challenge. Michael Reinhardt's book gives a clear and detailed analysis of the problem and the current state-of-the-art for tools that address this daunting task."
Michael Keating, Co-Author of the “Design Reuse Manual”, Synopsys, Mountain View, CA

"Reinhardt impressively makes the complex subject of physical design reuse and the more complex subject of automated layout modification very comprehensible.
His book describes all aspects of Automatic Layout Verification and how it can be used by engineers to effectively and efficiently reuse hard IP blocks. "
Michael Santarini, Senior EDA editor, EE Times, San Mateo, CA

"Market forces increasingly demand product migration, rather than redesign. In this timely and readable book, Michael Reinhardt offers a comprehensive description of the challenges involved in design reuse, and specifics on its toughest aspect, automated layout conversion. Examples of actual solutions from industry ground the theory."
Christian E. Herdt, Engineering Manager, Intel, Shrewsbury, MA

For more information on this and other Kluwer publications visit www.wkap.nl

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