Design Optimization
Speed Improvement
Yield Improvement
Power Optimization

Sucess Stories
Synopsys chooses RUBICAD's LADEE for layout migration of 0.13-micron memory compilers
Peregrine cuts design time and costs
IMI increases performance
OKI reuses Hard IP
Philips migrates microprocessor core
Qualcomm optimizes Standard Cell Libraries
Xilinx migrates FPGA

Dramatic increases in silicon capacity, coupled with market demand for greater performance at reduced cost and smaller size, are driving the development of more complex, highly integrated ICs. Functions that once required several separately-packed chips wired together on a printed-circuit board are now being integrated onto a single chip. At the same time, development time is shrinking. Design reuse is the only realistic solution to balancing the demands of IC complexity and time-to-market pressure. 
With the advent of ultra deep sub-micron technology, much of the focus on developing reusable cores as building blocks for SoC design has concentrated on soft IP. Now, however, a trend has begun toward the reuse of hard IP. 
The reuse of hard IP makes it possible to mix and match blocks on an SoC design faster, increase fab utilization, and realize higher returns on fab investments. 

Reuse of Hard IP Needs Flexibility for Layout
To reuse hard IP cores effectively, design teams need an automatic approach to modifying their cores to fit an SoC design. Modifying hard IP means modifying the physical layout of a design for a variety of reasons:

• Matching the design rules and grid of the process technology in which the SoC will be produced.
• Adjusting device sizes and W/L ratio to meet timing requirements for the new SoC in the new process technology. 
• Resizing signal and power lines to increase speed and improve power distribution. 

Hard IP Migration by RUBICAD’s TopQuality Migration Service
RUBICAD's TopQuality Migration Service multiplies the return on investment in your existing cores, blocks, macros and chips. Using RUBICAD's leading migration technology LADEE Tool Suite, our experts migrate the physical layout of your design to any other process technology for reuse in SoC or in another process technology.
After migration, the cores, blocks, macros or chips meet all your requirements for DRC, LVS, and grids, and the layout design has a hand-crafted density. 

RUBICAD's TopQuality Migration Service - Your Competitive Advantage
Customers of RUBICAD's TopQuality Migration Service automatically shift their hard IP to a different process technology for reuse in new SoCs or in advanced process technologies. They benefit from the smallest possible area, higher yields, and improved performance, resulting in higher earnings. 

Call (408) 995 3334 or send an email to service@rubicad.com and discuss your next design challenge with us.

Check out the success stories on this site and learn how other companies have leveraged their designs.

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