DECOR
The Layout Correction Engine for Ultra
Deep-Submicron
DECOR automatically corrects errors in
hierarchical, physical IC layouts. It uses a unique "Hyper-Cell" approach
that creates holographic views of individual layout cells and considers
the context of all placements in a hierarchical layout during checking
and correction.
DECOR corrects layout errors which traditional
physical verification tools can detect, but cannot fix. Traditionally,
layout designers have had to fix these errors manually. However, since
the number of circuits in ultra-deep sub-micron (UDSM) technology has risen
so high and become so complex, this manual approach is no longer efficient.
Considering the fact that the amount of physical design data, and consequently,
the number of errors to be corrected, will grow by 30 to 50% per year,
DECOR provides a more automated solution.
Applications
Correcting Design Rule Violations
DECOR automatically corrects design rule
violations in mask layouts. It thus allows very fast design of new layouts,
as well as linear shrinks, even if the design rules of the original technology
and the shrink technology are not 100% compatible.
Technology Conversion
DECOR allows designers to move an existing
mask layout from one fabrication technology to another by adjusting the
layout as necessary for higher yield and performance.
Timing Optimization
In ultra deep sub-micron technology, wire
delay in the longer wires has become more critical than transistor delay.
DECOR can adjust the width and spacing of critical wires to adjust the
final timing.
Correcting Signal Integrity Problems
Signal integrity problems are not usually
detected until the later phases of the verification cycle, after place
& route and timing verification has been done. DECOR performs a local
correction of critical wires to prevent a total re-route and re-verification.
Solving Power Issues
Because of higher circuit speeds and lower
voltage levels, the power grid in UDSM designs has become more sensitive.
To improve the power grid, DECOR can increase the width and spacing of
power buses where space is available, without increasing the layout area,
and without creating additional design rule violations.
In addition, DECOR can reduce overall
power consumption by implementing smaller transistor gates and reducing
wire capacitance in the physical design.
Solving Phase Conflicts
During the process of phase shift mask
generation, designers must solve phase conflicts. This is done by changing
the dimensions of the involved structures. By making these changes automatically,
DECOR can help to diminish the number of phase conflicts in the design.
Technology Features
Hyper-Cell Technology
Even if a sufficient number of designers
were available to fix the ever-growing number of layout errors, there would
still be the problem of maintaining the database’s hierarchy. The problem
designers face is that one cell used in multiple instances may be corrected
in one placement, but that correction will itself create new errors, both
DRC and LVS, in another placement. Layout designers try to prevent this
problem by copying the original cell under a different name, but this increases
the database and makes it flatter.
DECOR's new "Hyper-Cell" technology enables
a type of "holographic" view of the cells, by which the environment of
all cell placements can be observed in a single view. In this way, conflicts
among different cell placements can easily be prevented, many iterations
can be saved, and the original design hierarchy can be maintained during
correction.
Any Style of Hierarchy
DECOR works on any style of hierarchy.
Layouts that can be corrected include standard cell designs, structured
custom designs, or full-custom irregular designs with any number of hierarchical
levels. DECOR automatically extracts the hierarchy information from the
mask layout.
Any Size of Database
DECOR's highly efficient "Hyper-Cell"
approach allows the processing of a virtually unlimited capacity of layout
data. Huge layout databases of 2 GB and more can be processed in a very
short time frame.
Unlimited Levels of Hierarchy
DECOR can handle any level of hierarchical
data. This makes it easy to correct an existing design that was not originally
designed for automatic correction.
Maintaining Original Hierarchy
During automatic correction, DECOR maintains
the original hierarchy of a mask layout, no matter how regular or irregular
the hierarchical structure is. Partial flattening of layout data or duplication
of cells is not necessary. This allows designers to feed back a corrected
design into any given design flow.
Don't-Touch Areas
DECOR allows designers to specify layout
areas which should be excluded from correction or optimization. This is
very important for the fully automatic treatment of complex designs with
extremely critical layout and analog structures which should not be touched
at all.
Exclude-Cell Functionality
Special designs such as memory require
different design rule sets for different cells within the same design.
Sometimes cells are drawn with design rule violations on purpose. Those
cells should not be corrected during automatic correction. For that purpose,
DECOR allows specifying a list of cells which should be excluded from treatment.
Non-Orthogonal Structures
DECOR corrects any layout design style.
Orthogonal structures, as well as non-orthogonal structures in field and
device areas, can be processed.
Unlimited Number of Device Types
DECOR handles various devices, such as
transistors, resistors, and capacitors. It automatically corrects bent
as well as straight devices. Device types include, but are not limited
to, high- and low-voltage transistors, diodes, resistors, and capacitors.
User-Friendly Setup
DECOR provides one of the most comfortable
setups ever seen in physical design tools. An intuitive Graphical User
Interface guides the designer. Wizards for design rule implementation and
automatic setup ensure that even the novice user masters the task from
the beginning. No coding is required, which minimizes the learning curve.
Design-Independent Flow
After an initial technology setup, DECOR
automatically corrects any number of designs in the same technology in
an automatic batch run.
Highly Optimized Throughput
DECOR can handle any size of database
because it can work in parallel on a network. An integrated scheduler manages
the data handling in an efficient way for highly optimized processing time.
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